In order to weaken the high power LED electrostatic hazards, foreign companies released the latest research results

The three companies Samsung, Eudyna Devices and EpiValley, recently released the latest research on the method of reducing the damage of high power LED static.

Electrostatic discharge (ESD) damage usually refers to the pulse time. Less than 100 ns of high energy electrostatic pulse, the energy released by high energy electrostatic pulse can melt holes in the semiconductor material (Figure), the formation of small cracks, extending to the surface of LED material. According to the National Institute of standards (ANSI) on the semiconductor industry survey shows that the average product loss caused by electrostatic discharge damage in 8% ~ 33%.

From Seoul National University (Kookmin University) and kuonghui University (Kyung Hee University) researchers to study the common LED manufacturer EpiValley company, in order to improve the indium gallium nitride (InGaN) LED capacitor (capacitance). In order to increase the capacitance, Korean researchers have changed the silicon doping concentration of the 10nm thick N film before the growth of the quantum wells, the concentration changed from 3 x 1018 cm-3 to 2 * 1019 cm-3. When the quantum well is grown, the effect will be better if the doping concentration of in the 200nm thick P GaN film is adjusted to 4 * cm-3.

Electrostatic millisecond of energy can cause gold contact or nitride layer melts such massive destruction (as shown). In most cases, this phenomenon can be observed by the solder pad (bond pad) near LED. In fact, it is difficult to distinguish between ESD and EOS.

Diode as much as possible reduce the width of the depletion region can obtain higher capacitance, compared with Mg doping, in reverse bias (reverse bias), to improve the silicon doping concentration can reduce the width of the carrier depletion region of N region in LED. In the human model ESD test, the 500V with a low silicon doping concentration of LED in the reverse bias, the pass rate was only 27%. Correspondingly, the qualified rate of LED in the 7000V with high silicon doping concentration was 94%.

April 16th, Japan compound semiconductor manufacturer Eudyna Devices filed a patent application in the United States, through the GaN substrate LED epitaxial layer, simply add an extra heating treatment process, improve the tolerance of ESD LED. They heated the quantum well active region (MQW active region) to 975 DEG C to improve the crystal quality. In the subsequent epitaxial growth of the P type GaN layer, the temperature is reduced by more than 150 DEG C to ensure that the doped magnesium does not diffuse into the active region.

Eudyna R & D team claimed that the crystal defects can be extended under high voltage and pollution of the magnesium doped MQW region will reduce the resistance to ESD LED. In fact, no pollution of magnesium MQW and no heat treatment ESD high voltage multi quantum well LED are 500V and 571V, and use the method described in the patent, ESD LED can withstand voltage up to 3857V.

April 16th, Samsung has filed two patent application in the United States, announced the development of new methods to improve the performance of ESD, namely the use of transition metal elements or yttrium scandium in structure layer, the growth temperature can increase the electron emission layer below the multiple quantum well device.

Using GaYN/AlGaN or GaScN/AlGaN instead of InGaN, can make the growth temperature to enhance electron emission layer is below the MQW to 1000 DEG C or above, so the crystal quality will be better, so that LED can have better ability to resist ESD. GaYN/AlGaN or GaScN/AlGaN layer has a better current diffusion effect, but also help to improve the LED's ability to resist ESD.

Under normal circumstances, people are using indium gallium nitride (InGaN) to produce the electron emission layer, but indium (In) deposition temperature will exceed 1000 degrees, while using GaYN/AlGaN or GaScN/AlGaN instead of the InGaN layer, the growth temperature of In is likely to fall to 1000 DEG C or below. At the same time of improving the quality of the crystal, the band gap of the electron emission layer is helpful to provide a good current diffusion ability, can reduce the driving voltage of LED and further improve the LED resistance to ESD voltage.

OSRAM Opto Semiconductors LED Application Engineering Manager Joachim Reill pointed out that the above method is helpful to improve the yield and reliability of LED chip, but also can simplify the LED packaging process. At present, in order to reduce the harm of ESD to LED, usually in the LED package to install a ESD diode, if the chip has a strong ability to resist ESD, then do not need to use the ESD diode.